摘要
Improving the ruggedness of radio frequency power device is beneficial to enhance the ability of withstanding electro-static discharge (ESD) and output mis-match.To understand the electrical process happened in device intuitively, the electrical mechanism of state-of-art high-ruggedness N-channel RF-LDMOS (Radio Frequency Lateral Diffusion MOS), under TLP (Transmission Line Pulse) stress, has been studied.RF-LDMOS FETs with different gate widths had been manufactured using advanced 0.18μm BCD (Bipolar/CMOS/DMOS) process.It is found that the different failure points of simulation and measurement are coming from the random failure of ESD stress and thermal problems.The simulation results of different nodes under TLP stress proved that the P buried layer under source area plays an important role in holes flowing, and improves the ruggedness of RF-LDMOS.
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