vMAGIC〞Automatic Code Generation for VHDL

作者：Christopher Pohl; Carlos Paiz; Mario Porrmann

来源：International Journal of Reconfigurable Computing, 2009, 2009: 1-9.

DOI：10.1155/2009/205149

Automatic code generation is a standard method in software engineering, improving the code reliability as well as reducing the overall development time. In hardware engineering, automatic code generation is utilized within a number of development tools, the integrated code generation functionality, however, is not exposed to developers wishing to implement their own generators. In this paper, VHDL Manipulation and Generation Interface (vMAGIC), a Java library to read, manipulate, and write VHDL code is presented. The basic functionality as well as the designflow is described, stressing the advantages when designing with vMAGIC. Two real-world examples demonstrate the power of code generation in hardware engineering.